1. Field of the Invention
This invention relates to the manufacture of semiconductor devices, particularly devices having high dielectric-constant insulators.
2. Description of Related Art
Semiconductor memory storage capacity can be limited by the size of semiconductor devices manufactured on a semiconductor chip. As the desired memory size increases to meet increasing demands for more powerful computing, it is desirable to decrease the size of semiconductor devices accordingly. Semiconductor device size is limited, in part, by the ability of the conductive pathways (xe2x80x9cconductive linesxe2x80x9d) to remain electrically isolated from each other. Conductive lines can be made of a metal, which can be aluminum, copper, or other suitable metal, or can be another type of conducting material such as, by way of example only, polycrystalline silicon (xe2x80x9cpolysiliconxe2x80x9d).
I. High Dielectric Constant Insulators
Electrical isolation of conductive lines is typically carried out by layers of insulating materials deposited in between and over conductive lines. As the size of device features become smaller in advanced semiconductor manufacturing processes, the conductive lines are required to be closer together, that is, the spacing between conductive lines becomes smaller. As the spacing of conductive lines becomes smaller, there is less room available for the insulating material. Therefore, it is desirable for the insulating properties of the insulator to be sufficiently high to prevent leakage of unwanted electrical currents between conductive lines.
One important property of insulators is the dielectric constant (K). The dielectric constant is a measure of the ability of an insulator to prevent the discharge of electrical current between conductive electrodes through the insulator. Thus, better insulators have higher dielectric constants. The dielectric constant is quantified by comparing the insulating ability of an insulating material to the insulating ability of air, which is defined to have a dielectric constant of 10. For example, the commonly used dielectric material, silicon dioxide, has a dielectric constant of about 4. Insulators having high dielectric constants are defined herein to have dielectric constants of greater than about 4, and insulators having low dielectric constants are defined herein to have dielectric constants of less than about 4. For high-voltage applications, it is desirable to use insulators having high dielectric constants.
The thickness of an insulating layer can limit the minimum device size and conductive line spacing. In general, insulators having low dielectric constants must be thicker to provide an equivalent degree of insulation compared to insulators having higher dielectric constants. As semiconductor device sizes and spacing between conductive lines become smaller, insulating materials having higher dielectric constants are desirable. Furthermore, manufacturing of features having sizes in the sub-micron range requires that the insulating material be capable of being applied to the semiconductor device easily with a minimum of gaps or variations in thickness of the insulating layer.
An example of an insulating material having a high dielectric constant is tantalum pentoxide (Ta2O5), which can form a film having a dielectric constant of about 30. Tantalum pentoxide can be deposited by chemical vapor deposition (CVD) from the ortho-ethyl derivatized precursor, Ta(OC2H5)5. In a CVD apparatus, the precursor is dissociated to form reactive intermediates, including tantalum oxide radicals and ethyl moieties. The tantalum oxide radicals can be deposited on a semiconductor surface and can react to form a cross-linked crystalline film comprising tantalum pentoxide.
Other high-dielectric constant materials include, by way of example, tungsten, zirconium, strontium, barium-strontium and titanium oxides. These materials can be deposited from O-derivatized carbon-containing precursors in ways similar to those for tantalum pentoxide. A general structure for O-derivatized precursors suitable for deposition of high-dielectric constant materials according to this invention is: Mem(Oxe2x80x94R)n, where Me is a metal atom, m and n are integers, 0 is an oxygen atom, and R is a carbon-containing leaving group. By way of example only, leaving groups suitable for deposition of high-dielectric constant layers include alkyl groups such as O-ethyl, O-methyl, O-propyl, O-isopropyl, O-butyl, O-isobutyl, and other leaving groups known in the art. Regardless of the type of O-derivatized carbon-containing precursor, during typical CVD deposition processes, some of the carbon from the leaving groups liberated during dissociation can become deposited in the thin film. The carbon atoms, if present, contaminate the thin film, and must be removed. Removal of these contaminants can be accomplished by exposing the film to high temperatures in an environment containing an oxidant, such as by way of example only, oxygen. When treated at temperatures of about 600xc2x0 C. to about 900xc2x0 C., alternatively about 800xc2x0 C., the contaminating carbon atoms can oxidize to form carbon dioxide (CO2), which is volatile, and can be exhausted from the CVD chamber.
During the oxidation process however, some oxygen can diffuse through the tantalum pentoxide layer and can reach the surface of the silicon substrate, oxidizing the silicon substrate, forming a layer of silicon dioxide, herein termed xe2x80x9cbuffer oxidexe2x80x9d. Because silicon dioxide has a dielectric constant of about 4, this layer of buffer oxide effectively decreases the dielectric constant of the insulating film, thereby decreasing the insulating capability of the thin film.
II. Native Oxide Deceases Dielectric Constant of High Dielectric Constant Materials
In addition to the formation of buffer oxide described above, another source of silicon dioxide which can adversely affect high dielectric constant layers is commonly formed on semiconductor substrates. Newly manufactured silicon wafers typically have been exposed to oxygen during either manufacture and/or storage, thereby forming a layer of silicon dioxide, herein termed xe2x80x9cnative oxide.xe2x80x9d Even after exposing the wafer to HF and then cleaning the wafer (in what we commonly refer to as xe2x80x9cpre-gate oxide cleanxe2x80x9d steps), a layer of native oxide can remain, having a thickness in the range of 8 xc3x85 to about 10 xc3x85. This native oxide layer can have variable stoichiometry, wherein the ratio of oxygen atoms to silicon atoms is not integral. Thus, the chemical formula for this layer of native oxide can be stated as SiOxcx9c2. Furthermore, under high-temperature oxidizing conditions as described above for the oxidation of contaminating carbon atoms, the silicon substrate underlying the native oxide can become oxidized, thus forming an additional thickness of buffer oxide that can have a thickness in excess of 30 xc3x85. By having a dielectric constant of about 4, substantially lower than the desired K for the insulating layer, the native and buffer oxide layers can defeat the purpose of depositing the layer of high dielectric constant material.
The problems associated with prior art manufacturing processes are depicted in FIGS. 1-3. In FIGS. 1-3, identical elements have the same identifying numbers. FIG. 1 is a drawing depicting a semiconductor wafer 100 comprising a silicon substrate 104 having a layer of native oxide 108 formed on the surface of substrate 104. After the pre-gate oxide clean steps, the thickness of the native oxide layer 108 is typically in the range of about 8 xc3x85to about 10 xc3x85. FIG. 2 is a drawing depicting the same semiconductor wafer depicted in FIG. 1, having silicon substrate 104, native oxide layer 108, a nitride layer 112 and a layer of tantalum pentoxide 116 deposited on top of nitride layer 112. Tantalum pentoxide layer 116 is drawn stippled to depict the presence of carbon contamination. FIG. 3 is a drawing depicting the same semiconductor wafer as depicted in FIGS. 1-2, comprising silicon substrate 104, oxide layer 108, nitride layer 112 and tantalum pentoxide layer 116, but after oxidation at about 600xc2x0 C. in an oxygen-containing atmosphere. The oxidation removes carbon contaminants from tantalum pentoxide layer 116, and results in a high-dielectric constant film having a thickness of about 100 xc3x85. However, the oxidation increased the thickness of oxide layer 108 compared to the native oxide layer shown in FIGS. 1 and 2.
The problem of native oxide and buffer oxide growth is especially important for applications in which the layer of high dielectric constant material is to be very thin. Not only is the overall thickness of the dielectric layers (the xe2x80x9cmixed dielectricxe2x80x9d layer comprising buffer oxide and high dielectric material) larger than desired thickness (about 20 xc3x85), but the dielectric constant of the mixed dielectric material can be substantially lower than that of a layer of pure high dielectric constant material. The lower dielectric constant of the mixed dielectric material can limit device density and therefore semiconductor processing speed.
Therefore, an object of this invention is the manufacture of layers of insulating materials having a high dielectric constant while minimizing the contamination of the underlying semiconductor substrate with native oxide and buffer oxide.
Another object of this invention is the manufacture of thin layers of materials having high dielectric constant.
Another object of this invention is the development of methods and processes for deposition of thin layers of materials having high dielectric constant that can be easily integrated into existing semiconductor manufacturing processes.
Thus, this invention provides methods for decreasing the thickness of native oxide layers and for decreasing the growth of buffer oxide layers on a semiconductor wafer. The processes of this invention involve annealing the wafer under reducing conditions, such as in a low pressure atmosphere comprising a reducing agent being substantially free of oxygen. This annealing process reduces the thickness of the native oxide layer. Then, while oxygen is excluded from the chamber, a thin barrier layer is manufactured on top of the semiconductor substrate, and subsequently, a layer of high dielectric material is deposited on the top of the barrier layer. The barrier layer can decrease the diffusion of carbon atoms into the silicon substrate. Subsequent exposure of the wafer to high-temperature oxidation can decrease the amounts of carbon contaminants in the high-K film, and the barrier layer can decrease the amount of oxygen that can diffuse through to the substrate, thereby decreasing formation of buffer oxide. The reduction in thickness of both native oxide and buffer oxide layers decreases the amount of low-K material in the insulating layer, and thus can mitigate the decrease in K caused by dilution of the insulating layer by oxides. Thus, the K of the overall insulating layer can approach the K values for pure high-K dielectric materials.
Thus, one aspect of this invention is the annealing of semiconductor wafers in a reducing environment comprising hydrogen or ammonia gas to decrease native oxide present on the wafer.
Another aspect of this invention is the deposition of a barrier layer over a substrate from which the native oxide has been removed.
Another aspect of this invention is the formation of a barrier layer of nitride on the semiconductor substrate by rapid thermal annealing in the presence of ammonia gas.
A further aspect of this invention is the deposition of a thin layer of a high K material over a barrier layer of nitride.
An additional aspect of this invention is the manufacture of semiconductor devices having a thin film of insulating materials having a high dielectric constant.